Abstract
PROCESS VARIATION INDUCED MISMATCH ANALYSIS IN SENSE AMPLIFIERS

A Sense Amplifier is a very critical peripheral circuit in the memories as its performance strongly affects both the memory access time and the overall memory power dissipation. As the device dimensions scale below 100 nm, the process variations are increasing and are impacting the circuit design significantly. In this research paper, the effects of process variation induced transistor mismatch on the sense amplifier performance are studied. A comparative study of the effect of mismatch on the delay for different sense amplifier configurations at 45 nm technology is presented.